The Women in Hardware Mentorship (WHM) Program kicked off the pilot program in January 2023. It was founded by Antonella Oliva and senior industry women leaders with a goal to increase the presence of women in leadership positions in hardware engineering by sharing mentor women leaders’ strategies.
Founder Antonella Oliva partnered with GSA WLI to expand this program by creating a community of women that encourages the culture of mentorship while making a lasting impact for women of all generations in our industry.
Mentorship Circles are formed where mentees from companies throughout the industry can interact and learn from one another. Curriculum includes topics on:
High Performing Mid-career level managers and individual contributors in HW engineering (4-5 levels below C-suite)
Industry leaders 1-3 levels below C-suite. Passionate about mentoring.
6 monthly Firechats (virtual) with one Mentor and six Mentees. Specific Curriculum topics are discussed. Pre-work is assigned to encourage Mentees participation.
Quarterly 1:1 between Mentees and Mentors are encouraged.
Time Commitment (over one year):
Mentors: 2-3 hours/month
Mentees: 2-3 hours/month
Monthly Firechats:
January – June (held virtually)
Two F2F Events (in-person):
January/August
Quarterly 1:1 Sessions:
January – January (over one year)
WHM Founder
Antonella Oliva
WHM Founder
Dr. Antonella Oliva retired last year after a rewarding career of almost 30 years in Hardware Engineering. She was an executive at Apple and before that at Sun Microsystems.
At Apple she was the Director of Si Technology Pathfinding and Roadmap where she set the direction of Si technologies for Apple future products. In this role she collaborated with world class research teams at foundries and academia.
She was part of the team that founded Apple Silicon team. In this role she was instrumental in bringing advanced nodes from R&D to production.
As a Director of Design Enablement at Sun Microsystems, she developed and championed the design and reliability methodology used in Sun Microsystems low and high end servers.
She also gained extensive experience with Technology nodes development, transfer and ramp as Senior Member of the Technical Staff at Texas Instruments.
Dr. Oliva holds a Ph.D. in Physics from University of Salerno, Italy and SUNY in Stony Brook NY.
After her retirement, Dr Oliva founded Women in Hardware Mentoring in collaboration with other senior leaders. This is the first Mentorship initiative that engages Mentors and Mentees across companies. WHM Mission is to increase number of women in executive positions in Hardware Engineering and building a cohort of senior leaders across companies.
She is also involved in several projects focused on community gardens and food education with the goal of having an impact on environment and social equity.
Teradyne
Nitza Basoco
Technology and Market Strategist
Teradyne
Nitza is a technology leader with over 22 years of semiconductor experience and leads Teradyne’s strategic marketing efforts for vertical integrators. Previously, she was the VP of Business Development at ProteanTecs, responsible for driving partnership strategies and building value-add ecosystem growth. Before that, Nitza was the VP of Operations at Synaptics with responsibility for growing and scaling their worldwide test development, product engineering and manufacturing departments. Prior to Synaptics, Nitza spent a decade holding various leadership positions within the operations organization at MaxLinear, ranging from test development engineering to supply chain. Earlier in her career, Nitza served as a Principal Test Development Engineer for Broadcom Corporation and as a Broadband Applications Engineer at Teradyne. Nitza holds MEng and BSEE degrees from the Massachusetts Institute of Technology.
Fadoua Chafik
Senior Product Manager
Google
Fadoua Chafik is a product manager and a semiconductor technologist with 17 years of international experience in world-class semiconductor technology R&D and Wireless Chips Product management.
At Google, Fadoua is a senior product manager, responsible for Tensor chips fundamentals, from product pathfinding, conception to productization, including product strategy and value proposition.
Prior to Google, Fadoua served as the lead of Qualcomm 4th generation Automotive Cockpit products. Fadoua has led various roles as a semiconductor technologist at STMicroelectronics France and the IBM Semiconductor Alliance in New York.
Fadoua is passionate about DEI and empowering women and girls to reach their full potential. She served as the president of Qualcomm Women (9000+ members) and she is currently co-chairing the Women ERG at Google San Diego.
Fadoua holds two master’s degrees, in Material Science and in Micro-and-Nano Technologies, as well as a mini-MBA from Rutgers Business School. She holds one granted patent and 11 filed applications
AMD
Dr. Angela Dalton
Director of Strategic Research and Advanced Development (RAD) Operations
AMD
Dr. Angela Dalton is the Director of Strategic Research and Advanced Development (RAD) Operations at Advanced Micro Devices (AMD). She oversees business operations within the RAD organization and leads a portfolio of strategic initiatives on innovative new hardware and software technologies for high performance computing, artificial intelligence, security, and future computing capabilities. Angela has a B.S. in computer engineering from Virginia Tech as well as an M.S. and a Ph.D. in computer science from Duke University.
Western Digital
Dr. Yan Li
Vice President, Engineering, Memory Technology
Western Digital
Dr. Yan Li received her B.S. degree in Modern Physics from the University of Science and Technology of China. She received an M.S. and Ph.D. in Materials Science and Engineering from Lehigh University in Pennsylvania, USA. In 1998, she joined SanDisk Corporation, Sunnyvale, CA, working on Flash Memory Technology. She led teams that designed many generations of NAND flash memory, including the industry’s first 3 bits per cell NAND memory, and brought them into mass production. She has won the Lewis Winner Award for best paper at International Solid State Circuit Conferences (ISSCC) in 2008 and 2012. She is currently a Vice President for memory technology, leading the advanced 3D NAND process, as well as other non-volatile memories and new innovation initiatives. She has created many innovative ideas to improve NAND products, and holds more than 200 patents. She won the Super Woman of Flash award in 2022 Flash Memory Summit. She served as a mentor in GSA woman leadership initiative in 2023.
Intel
Sonia Leon
Sr. Principal Engineer, Director of Design Technology Pathfinding
Design Enabling, Technology Development
Intel
Sonia is an industry recognized and sought-after technical expert with 30+ yrs. of industry experience in the field of Design Technology with the unique expertise and passion for integration of technologies to enable holistic design optimization solutions across the product stack. She is currently a Senior Principal Engineer and Director of Design Technology Pathfinding at Intel’s Technology Development Group in Santa Clara, CA, USA, with current focus on 3D-IC System Technology Co-Optimization (STCO) based on Intel’s advanced silicon and packaging technologies to enable product scaling beyond Moore’s Law.
Prior to joining Intel in 2010, Sonia was with Oracle/Sun Microsystems for 12yrs where she served as a Senior Principal Engineer and Director of Technology, responsible for defining holistic Design Platforms in advanced technologies, as well as Sun’s strategic joint efforts with the industry ecosystem (Foundry, EDA, Design). She also led the design of several high-performance SPARC Processors, including Sun’s first-generation of Chip-Multi-Threaded CPUs. Before joining Sun, Sonia was with Chromatic Research and Motorola leading the development of VLWI Multimedia SoCs and DSP processors for cellular.
Sonia has authored 16 papers in microprocessor design and holds 3 U.S patents in circuit design. She is a Senior Member of IEEE and served in the ISSCC Technical Program Committee, ISSCC Forum and Industry Committees. Sonia received her MSEE from the University of Southern California and BSEE from Escuela Superior Politecnica del Litoral (Ecuador).
Sonia is a passionate mentor, sponsor and role model for Intel’s Diversity community participating in multiple internal and industry wide initiatives.
Marvell
Jeanne Trinko Mechler
Fellow
Custom & Compute Silicon
Marvell Technology
Jeanne Trinko Mechler, is a fellow at Marvell Technology in Custom & Compute Silicon. After 30 years at IBM, she joined GLOBALFOUNDRIES in 2015, and Marvell in 2018. She has decades of experience in SOC design including wired & wireless SOCs, interface chiplets, AI/Machine learning accelerators, and has led over 60 chip designs in more than 10 technology nodes. She led a team that implemented the first Peta-Op/s AI training chip. She was the technical lead for ChipletX, an 800G Ethernet repeater chiplet using 112G XSR (eXtra Short Reach SerDes) and 112G long reach SerDes, which was demonstrated at OCP and CES. She is an author of the engineering textbook High Speed SerDes Devices and Applications, as well as more than 20 patents/publications. Jeanne serves as the technical conference chair for Marvell’s bi-annual company-wide engineering conference. Early in her career, she performed seminal research on transition delay faults, test generation and diagnostics, with publications in the Journal of Research and Development. She was the first person to use eDRAM devices as high efficiency decoupling capacitors, on chips without eDRAM memories. She was the first to root cause, diagnose, and publish on Contention-Induced Latch-up, a reliability failure mechanism at the International Reliability Physics Symposium. She developed hierarchical design methodology and automated design profiling when flat chip designs became impractical and has been a frequent invited speaker at the Design Automation Conference. She has experience in circuit design, test chip design, qualification, reliability, design-for-test, and failure analysis, in addition to SOC design and architecture. For more than thirty years, she led a week-long Science & Technology camp for middle-school girls to build a pipeline of young women excited about engineering. She was a charter member of the University of Vermont SWE section, the North Country SWE section, and the is a lifetime member of the Society of Women Engineers, served three years as Governor of the New England region, and is a frequent SWE conference speaker. Jeanne earned the M.S. and B.S. in electrical engineering from the University of Vermont and the M.S. degree in engineering management from the National Technological University. She is the mother of three children, enjoys international travel and photography, and has visited 35 countries.
Intel
Ramune Nagisetty
Sr. Principal Engineer
Logic Technology Development Group
Intel
Ramune Nagisetty is a Senior Principal Engineer in Intel’s Logic Technology Development Group and leads LTD External Engagements. She started her career at Intel in 1995 as a rotation engineer after completing an MSEE specializing in solid state physics from the University of California, Berkeley. In 1997 she joined LTD and contributed to the development of strained silicon and pathfinding for Hi-K metal gate and FinFET transistors. In 2006 she joined Intel Labs to lead Strategic Technology Programs. While in Intel Labs she led the effort to develop Intel’s Tiled System in Package Architecture, which paved the way for Intel’s current chiplet strategy. In 2017 she co-led the effort to develop a new industry scale ecosystem based on chiplets and advanced packaging. In 2019 she returned to TD to create the cross-Intel Cooptimization Pipeline to anticipate future inflection points and implications to process, packaging, design, and architecture. She is currently focused on the area of process-design interactions. She has authored fourteen technical publications and has fifteen issued or pending patents related to device physics, high performance process technology, and technology usage models. Her vision for a future industry-scale chiplet ecosystem has been featured in Wired Magazine, AnandTech, and IEEE Spectrum. In her spare time she has fun singing, songwriting, and playing the electric guitar in two Portland bands and enjoys gardening and skiing.
Intel
Nevine Nassif
Senior Fellow
Intel
Nevine Nassif is an Intel Senior Fellow and technologist focused on server development in the Design Engineering Group at Intel Corporation. She leads design work on the Sapphire Rapids and Emerald Rapids Intel® Xeon® server processors targeted at data centers. Based at Intel’s Design Center in Massachusetts, Nassif is responsible for advancing innovation and efficiency in silicon and product integration to enable modularity and reuse in base and derivative products. Earlier in her Intel career, Nassif was responsible for various aspects of the design, convergence and delivery of Intel Xeon and Intel® Itanium® processors.
Cadence
Janet Olson
Vice President Research & Development for Front-End Design
Cadence
Janet Olson is Vice President Research and Development for Front-End Design at Cadence Design Systems. Janet is responsible for Modus, Cadence’s IC test, high level synthesis and constraint verification products. Janet has a master’s degree in Electrical Engineering from Stanford and a bachelor’s degree in Computer Engineering from CMU and holds 7 US patents. Janet has been recognized with the 2017 Marie R. Pistilli Electronic Design Award and the 2016 YWCA Tribute to Women award.
Microsoft
Padma Parthasarathy
Partner Design Verification/Validation Architect
Microsoft’s Azure Hardware Systems and Infrastructure
Padma is a Partner Design Verification/Validation Architect within Microsoft’s Azure Hardware Systems and Infrastructure group. This is her 25th year at Microsoft. She started to work with silicon for set-top boxes as a part of WebTV Networks.
She has worked on all the generations of XBOX, Kinect, Band and Hololens encompassing all phases of the project starting with architecture to manufacturing and productization, primarily focusing on verification and validation aspects for all phases. Recently she has been working on AI Silicon for Azure Data Centers. The best parts of the work she enjoys are the great teams she gets to work with, breaking down huge complex problems and putting plans in place to solve them, mentoring and the Giving Campaign. She is grateful and very humbled by the learning and opportunity that Microsoft has provided for her career growth.
Outside of work she is actively involved with community work. She holds a M.S. in Math and M.Tech in Computer Engineering from Indian Institute of Technology. She is grateful to have a very understanding husband and they have an adopted son who is a sophomore in college. She Served as a guest mentor in GSA’s women leadership initiative in 2003.
Meta
Elene Terry
Director, Silicon Accelerators
Meta
AMD
Meta
Olivia Wu
Technical Lead at Infra Silicon Team
Meta
Diodes
Emily Yang
Senior Vice President, Worldwide Sales & Marketing
Diodes Incorporated
Emily Yang is senior vice president of Diodes Incorporated, a leading global manufacturer and supplier of semiconductors, where she has reengineered the company’s focus and guides its global sales and marketing teams to drive revenue and profit.
Since being appointed vice president of worldwide sales and marketing in 2017 she led teams across North America, Europe, and Asia to double the company’s revenue from $1B to $2B, and grow gross profit by over 130 percent. She currently spearheads Diodes’ expansion into the automotive and Industrial markets, which now accounts for approximately 47 percent of the company’s revenue. Her responsibilities also include establishing go-to-market strategies, managing strategic customers relationships, and representing Diodes to the investor community.
Yang strongly believes in the power of mentoring and champions Diodes’ Women’s Initiative Program, which includes mentoring and fireside chat programs. She is an industry-recognized and sought-after speaker, having spoken at the CASPA Annual Conference, Rainmaker conference and supplier events in addition to membership in the Global Semiconductor Association and Women’s Leadership Initiative, and enjoys sharing her deep experiences as both a seasoned high-tech executive and as a woman dedicated to leadership and exemplary performance.
Yang has been with Diodes since the acquisition of Pericom Semiconductor Corporation in 2015, where she was vice president of global sales. She held a number of sales management positions with Pericom including vice president of sales, North America/Europe; contract manufacturing sales director; western regional sales director; and strategic account sales director covering Asia, North America, and Europe. She holds a bachelor’s degree in Economics from the University of Toronto.
ams Osram
Jennifer Zhao
Executive VP and General Manager, BU AOS
ams OSRAM
Jennifer Zhao is an experienced senior executive in the semiconductor industry. She has held multiple executive positions in global semiconductor companies. Jennifer joined ams OSRAM in 2017 and is the Executive Vice President and General Manager of the Advanced Optical Sensors Business Unit responsible for the development and delivery of leading optical sensor solutions for global customer base. She leads a global team of about 500 employees based in North America, Europe and Asia. Jennifer is President and CEO of ams OSRAM USA Inc. She also serves as Board of Director in OSRAM Sylvania Inc., one of the legal entities in ams OSRAM Group. Jennifer is advisory board member for International Semiconductor Executive Summit (ISES) and Fierce Electronics.
Jennifer joined ams from Nexperia where she was the Senior Vice President of Global Sales. Jennifer´s extensive semiconductor background also includes industry-leading companies such as NXP Semiconductors where she was Vice President and General Manager and Philips Semiconductors.
Jennifer holds a Bachelor of Science degree in mathematics from Beijing University in China and a Master of Business Administration degree from Suffolk University in the U.S. (graduated as Valedictorian). She is fluent in English and Chinese.
Jennifer won Woman of the Year award at Questex’s Sensors Innovation Week in 2020. She was a featured speaker on Transformative Leadership at SSIA’s Semiconductor Women’s Forum in Mar 2021 in Singapore. Jennifer was also featured in Leading Women in Engineering & Science in Medical Design Briefs Mar 2021 issue. Jennifer was awarded as Woman of Influence by Silicon Valley Business Journal in 2021 and won Asian American Executive of the Year by CIE USA in 2021. Most recently, Jennifer was invited as the moderator for Women Leadership and Advancing Inclusion in Semiconductor Industry panel at ISES conference held in Arizona, US in May 2022. Jennifer serves as a role model for women in the STEM field and is passionate about the impact of diversity and inclusion on sustainable company performance and business growth.
Antonella Oliva, WHM Founder
Traci Brandon, Director of Women’s Leadership Initiative
For additional information on this program, please contact wli@gsaglobal.org.